PIC18F8585T-I/PT【PDF 87/424 页】IC PIC MCU FLASH 24KX16 80TQFP

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Sheet目录3881

83页 84页 85页 86页 [87页]88页 89页 90页 91页

2004 Microchip Technology Inc.

DS30491C-page 175

PIC18F6585/8585/6680/8680

16.0

ENHANCED CAPTURE/

COMPARE/PWM (ECCP)

MODULE

The CCP1 module is implemented as a standard CCP

module with enhanced PWM capabilities. These capa-

bilities allow for 2 or 4 output channels, user selectable

polarity, dead-band control, and automatic shutdown

and restart and are discussed in detail in Section 16.2

“Enhanced PWM Mode”.

The control register for CCP1 is shown in Register 16-1.

addition

the

expanded

functions

the

CCP1CON register, the CCP1 module has two

additional registers associated with enhanced PWM

operation and auto-shutdown features:

ECCP1DEL

ECCP1AS

REGISTER 16-1:

CCP1CON REGISTER

R/W-0

P1M1

P1M0

DC1B1

DC1B0

CCP1M3

CCP1M2

CCP1M1

CCP1M0

bit 7

bit 0

bit 7-6

P1M1:P1M0: Enhanced PWM Output Configuration bits

If CCP1M<3:2> = 00, 01, 10:

= P1A assigned as capture/compare input; P1B, P1C, P1D assigned as port pins

If CCP1M<3:2> = 11:

= Single output; P1A modulated, P1B, P1C, P1D assigned as port pins

= Full-bridge output forward; P1D modulated; P1A active; P1B, P1C inactive

= Half-bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as

port pins

= Full-bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive

bit 5-4

DC1B1:DC1B0: PWM Duty Cycle bit 1 and bit 0

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are

found in CCPR1L.

bit 3-0

CCP1M3:CCP1M0: Enhanced CCP Mode Select bits

0000

= Capture/Compare/PWM off (resets CCP1 module)

0001

= Reserved

0010

= Compare mode, toggle output on match

0011

= Capture mode, CAN message time-stamp

0100

= Capture mode, every falling edge

0101

= Capture mode, every rising edge

0110

= Capture mode, every 4th rising edge

0111

= Capture mode, every 16th rising edge

1000

= Compare mode, initialize CCP pin low, on compare match, force CCP pin high

1001

= Compare mode, initialize CCP pin high, on compare match, force CCP pin low

1010

= Compare mode, generate software interrupt only, CCP pin is unaffected

1011

= Compare mode, trigger special event, resets TMR1 or TMR3

1100

= PWM mode; P1A, P1C active-high; P1B, P1D active-high

1101

= PWM mode; P1A, P1C active-high; P1B, P1D active-low

1110

= PWM mode; P1A, P1C active-low; P1B, P1D active-high

1111

= PWM mode; P1A, P1C active-low; P1B, P1D active-low

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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